- Professor of Practice, Computer Science & Engineering
- Joint Faculty in: Computer Engineering
- Phone: 979-845-5480
- Email: tyagi@cse.tamu.edu
- Office: PETR 208
Educational Background
- Ph.D. Computer Engineering, University of Louisiana, Lafayette, Louisiana, 1993
- M.S. Electrical and Computer Engineering, University of Louisiana, Lafayette, Louisiana, 1989
- B.S. Electronics & Communication, Kamla Nehru Institute of Technology, Sultanpur, India, 1987
Research Interests
-
- Hardware Verification
- Secure Computing
- High Performance Computing Architectures
Teaching Interests
- Computer Architecture
- Data Structures and Algorithms
- Hardware Verification
- Project Management
Industry Experience
- Twenty years of service at Intel in positions ranging from individual technical contributor to senior director in Server Development Group.
- Worked on eight generations of CPU’s at Intel; most recently managed the design and execution of Knights Landing: 2015 2nd Generation Xeon Phi Product
- Project Management at Intel Corporation in Processor Design
Awards & Honors
- Texas A&M CSE Undergraduate Faculty Teaching Excellence Award, 2022
- Provost Academic Professional Track Faculty Teaching Excellence Award, 2022
- Texas A&M Association of Former Students University-Level Distinguished Achievement Award in Teaching, 2021
- Texas A&M Honoring Excellence Award for Outstanding Support of On-Campus Students’ Academic Success, 2020
- Texas A&M Association of Former Students Distinguished Achievement Award in Teaching - College Level, 2019
- Lambda Sigma Honor Society National Level Recognition (Advisor), 2018
- Texas A&M ITS Instructional Pedagogy Award, 2018
- Texas A&M CSE Undergraduate Faculty Teaching Excellence Award, 2017
- Texas A&M College of Engineering Teaching Excellence Award, 2016
- Texas A&M Center for Teaching Excellence Grant for Flipping Course Content, 2016
- Texas A&M Professor of Practice Instructional Grant Award, 2015
- Texas A&M CSE Undergraduate Faculty Teaching Excellence Award, 2015
Selected Publications
- “Machine Learning-Guided Stimulus Generation for Functional Verification”, DVCON’20, San Jose, CA, March 2020
- “Stimulus Optimization in Functional Verification using Machine Learning”, CDNLive 2019, San Jose, CA, April 2019
- “The Path to an Industry Oriented Design Verification Track”, CDNLive 2017, San Jose, CA, April 2017
- “On Bringing Chip Design Verification and Validation to Academia,” CDNLive 2016, San Jose, CA, April 2016
- “Defect Clustering Viewed Through Generalized Poisson Distribution,” IEEE Transactions on Semiconductor Manufacturing, Vol. 5, No. 3, August 1992, pp. 196-206
- “Image Segmentation on a 2D Array by a Directed Split and Merge Procedure,” IEEE Transactions on Signal Processing, Vol. 40, No. 2, November 1992, pp 2804- 2813