• Professor
Weiping Shi

Educational Background

  • Ph.D. University of Illinois, Urbana-Champaign
  • MS Xian Jiaotong University, China
  • BS Xian Jiaotong University, China

Research Interests

  • His research interests include computer-aided design of Very Large Scale Integration (VLSI) CAD, including physical design, parasitic extraction, fault diagnosis, variational analysis and process synthesis.

Awards & Honors

  • IBM Faculty Award
  • Best Paper Award, Design Automation Conference
  • Best Paper Award, Asia and South Pacific Design Automation Conference
  • IEEE Fellow

Selected Publications

  • W. Shi, J. Liu, N. Kakani and T. Yu, “A fast hierarchical algorithm for 3-D capacitance extraction”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, No. 3, March 2002, pp. 330-336.
  • W. Shi and Z. Li, “A fast algorithm for optimal buffer insertion”, IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, Vol. 24, No. 6, June 2005, pp. 879-891.
  • X. Lu, Z. Li, W. Qiu, H. Walker, and W. Shi, “Longest path selection for delay test under process variation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24, No. 12, Dec. 2005, pp. 1924-1929.
  • W. Shi and C. Su, “The rectilinear Steiner arborescence problem is NP-complete”, SIAM Journal on Computing, Vol. 35, No. 3, 2006, pp. 729-740.