• Adjunct Professor, Electrical and Computer Engineering
Jeyanandh Paramesh.

Educational Background

  • 2006 Ph.D Electrical Engineering, University of Washington, Seattle.
  • 1998 M. S Electrical Engineering, Oregon State University.
  • 1996 B. Tech Electrical Engineering, Indian Institute of Technology, Madras.

Selected Publications

  • M. M. R. Rizi, J. Fu, M. Ghaedi Bardeh, N. Naseh, J. Paramesh and K. Entesari, "An mm-Wave Full-Duplex Front End With Integrated LNA, PA, and Electrical Balance Duplexer," IEEE Transactions on Microwave Theory and Techniques, doi: 10.1109/TMTT.2025.3604338.
  • X. Li, V. P. J. Chung, M. G. Guney, T. Mukherjee, G. K. Fedder and J. Paramesh, "A 46.6 μg/√Hz Single-Chip Accelerometer Exploiting a DTC-Assisted Chopper Amplifier," IEEE Journal of Solid-State Circuits, vol. 59, no. 2, pp. 502-515, Feb. 2024
  • C. Rong, J. Paramesh and L. R. Carley, “A Deep Reinforcement Learning Framework for High-Dimensional Circuit Linearization,” IEEE Trans. On Circuits and Systems II, September 2022
  • S. Mondal, L. R. Carley and J. Paramesh, “Dual-Band, Two-Layer Millimeter-Wave Transceiver for Hybrid MIMO Systems” IEEE Journal of Solid State Circuits, Feb 2022.