Sebastian Hoyos

Associate Professor

Hoyos, Sebastian

Office: WEB 315D
Phone: 979.862.4253

Personal Website
Google Scholar Profile

Research Interests

Design and implementation of mixed-signal processing systems, techniques and algorithms that jointly design for analog and digital systems with the objective of reducing power consumption and complexity or enhancing performance of high-speed and high dynamic range wireline and wireless communication systems

  • Mixed-Signal Processing Solutions for High Speed, High-Bandwidth, High-Dynamic Range and Low-Power Applications
  • Communication Theory, Wireless Communications, Broadband Mobile Communications
  • Robust Signal Processing and its Applications


  • Ph.D. University of Delaware, 2004
  • M.S. University of Delaware, 2002
  • B.S. Pontificia Universidad Javeriana, 2000

Selected Publications

S. Pentakota and S. Hoyos, “Least Mean Squared Background Calibration For OFDM Multi Channel Receivers,” to appear in Journal of Circuits, Systems, and Computers.

S. Hoyos, B. Tsang, J. Vanderhaegen, Y. Chui, Y. Aibara, H. Khorramabadi, and B. Nikolic, “A 15 MHz to 600 MHz, 20 mW, 0.38 mm2 Split-Control, Fast Coarse Locking Digital DLL in 0.13um CMOS,” to appear at the IEEE Transactions on Very Large Scale Integration Systems.

R. Saad and S. Hoyos, "Feed-Forward Spectral Shaping Technique for Clock-Jitter Induced Errors in Digital-to-Analog Converters," IET Electronics Letters, Vol 47, Issue 3, pp. 826-828, Feb. 2011.

E.A. Sobhy and S. Hoyos, “A Multiphase Multipath Technique With Digital Phase Shifters for Harmonic Distortion Cancellation,” IEEE Transactions on Circuits and Systems II, Vol. 57 , No. 12, pp. 921-925, Dec. 2010.

S. Hoyos, S. Pentakota, Z. Yu, E. Sobhy, X. Chen, R. Saad, S. Palermo, and J. Silva-Martinez, “Clock-Jitter Tolerant Wideband Receivers: An Optimized Multi-Channel Filter-Bank Approach,” IEEE Transactions on Circuits and Systems I, Vol. 58, No. 2, pp. 253 – 263, Feb. 2011.

X. Chen, Z. Yu, S. Hoyos, B. M. Sadler, and J. Silva-Martinez, “A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing,” IEEE Transactions on Circuits and Systems I, Vol. 58, Issue 3, pp. 507-520, Mar. 2011.

R. Saad and S. Hoyos, "Sensitivity of single-bit continuous-time analogue-to-digital converters to out-of-band blockers," IET Electronics Letters, Vol. 46, No. 12, pp. 826–828, June 2010.

K. Raviprakash, R. Saad, and S. Hoyos, “Reduced Area Discrete-Time Down-Sampling Filter Embedded with Windowed Integration Samplers,” IET Electronics Letters, Vol. 46, Issue 12, pp. 828–830, June 2010.

J. Kim, S. Hoyos, and J. Silva-Martinez, “Wideband Common-Gate CMOS LNA Employing Dual Negative Feedback with Simultaneous Noise, Gain, and Bandwidth Optimization,” IEEE Transactions On Microwave Theory And Techniques, Vol. 58, No. 9, pp. 2340-2351, Sept. 2010. Top 2 most read paper of the IEEE- Microwave Theory and Techniques, September 2010.

C.-Y. Lu, F. Silva-Rivas, P. Kode, J. Silva-Martinez, and S. Hoyos, "A 6th-order 200MHz IF Bandpass Sigma-Delta Modulator With over 68dB SNDR in 10MHz Bandwidth,” IEEE Journal of Solid State Circuits, Vol. 45, No. 6, pp. 1122-1136, June 2010. Top 16 most accessed paper in IEEE overall, June 2010, and top 6 most read paper of the IEEE- Journal of Solid-State Circuits, June 2010.