• Ford Motor Company Design Professor II, Computer Science
Hank Walker

Educational Background

  • Ph.D., Computer Science, Carnegie Mellon University, 1986
  • M.S., Computer Science, Carnegie Mellon University, 1984
  • B.S., Engineering (Honors), California Institute of Technology, 1979

Research Interests

    • Integrated Circuit Test
    • Defect-Based Test
    • Delay Test
    • IDDQ Test
    • Fault Diagnosis
    • Realistic Fault Modeling
    • Parametric and Functional Yield Prediction

Selected Publications

  • X. Lu, Z. Li, W. Qiu, D. M. H. Walker and W. Shi, “Longest Path Selection for Delay Test under Process Variation,” IEEE Transactions on Computer-Aided Design. To appear December 2005. [PDF]
  • S. Sabade and D. M. H. Walker, “IDDX-Based Test Methods: A Survey,” ACM Transactions on Design Automation of Electronic Systems, vol. 9, no. 2, pp. 1-39, April 2004. [PDF]
  • S. Sabade and D. M. H. Walker, “Outlier Identification Using Neighbor Current Ratios,” Journal of System Architecture (Special issue on Design and Test of SOCs), vol. 50, no. 5, pp. 287-294, April 2004. [PDF]
  • Z. Li, X. Lu, W. Qiu, W. Shi and D. M. H. Walker, “A Circuit Level Fault Model for Resistive Bridges,” ACM Transactions on Design Automation of Electronic Systems, vol. 8, no. 4, pp. 546-559, October 2003. [PDF]
  • S. Sabade and D. M. H. Walker, “IDDQ Test: Will It Survive the DSM Challenge?” IEEE Design and Test of Computers, vol. 19, no. 5, pp. 8-16, Sept./Oct. 2002. [PDF]
  • B. Xue and D. M. H. Walker, “IDDQ Test Using Built-In Current Sensing of Supply Line Voltage Drop,” IEEE International Test Conference, Austin, TX, Oct. 2005. To appear. [PDF]
  • J. Wang, Z. Yue, X. Lu, W. Qiu, W. Shi and D. M. H. Walker, “A Vector-based Approach for Power Supply Noise Analysis in Test Compaction,” IEEE International Test Conference, Austin, TX, Oct. 2005. To appear. [PDF]
  • J. Wang, X. Lu, W. Qiu, Z. Yue, S. Fancler, W. Shi and D. M. H. Walker, “Static Compaction of Delay Tests Considering Power Supply Noise,” IEEE VLSI Test Symposium, Palm Springs, CA, May 2005, pp. 235-240. [PDF]
  • B. Xue and D. M. H. Walker, “Technology Scaling Issues of an IDDQ Built-In Current Sensor,”IEEE International Workshop on Defect Based Testing, Palm Springs, CA, April 2005, pp. 11-16. [PDF]
  • W. Qiu, J. Wang, D. M. H. Walker, D. Reddy, X. Lu, Z. Li, W. Shi and H. Balachandran, “K Longest Paths Per Gate (KLPG) Test Generation for Scan-Based Sequential Circuits,” IEEE International Test Conference, Charlotte, NC, Oct. 24-29, 2004, pp. 223-231. [PDF]